Kaveri Hatti | Engineering| Women Researcher Award Posted on 05/02/2025 by sciencefather Mrs. Kaveri Hatti | Engineering| Women Researcher Award Profile Googlescholar Education averi Hatti is a dedicated researcher and educator in the field of VLSI Design, Embedded Systems, and Hardware Security. She is currently pursuing a Ph.D. at Amrita School of Engineering, Bangalore, focusing on FPGA-based security architectures. With a strong academic background, she holds an M.Tech in VLSI Design and Embedded Systems from VTU Regional Office, Gulbarga, and a B.Tech in Electronics and Communication Engineering from SLN College of Engineering, Raichur. Kaveri has extensive teaching experience, having served as a Lecturer at Tagore Memorial Polytechnic College and Government Polytechnic College in Raichur before joining Amrita School of Engineering, Bangalore, as a Teaching Assistant in 2022. Her expertise lies in FPGA design, Verilog, RTL design, and hardware security implementations, utilizing tools like Xilinx ISE, VIVADO, ModelSim, and Cadence. Work experience Kaveri Hatti has a strong background in academia, with extensive teaching experience spanning several years. She began her career as a Lecturer at Tagore Memorial Polytechnic College, Raichur, from August 2009 to December 2012, where she played a key role in instructing and mentoring students in electronics and communication engineering. Simultaneously, she also served as a Lecturer at Government Polytechnic College, Raichur, from June 2009 to June 2011. Currently, she is working as a Teaching Assistant at Amrita School of Engineering, Bangalore, since February 2022, contributing to research and assisting in the academic development of students in the field of VLSI Design and Embedded Systems. Publication Design and Implementation of Enhanced PUF Architecture onFPGA K hatti International Journal of Electronics Letters, https://doi.org/10.1080 The mux-based puf architecture for hardware security K Hatti, C Paramasivam 2021 International Conference on Circuits, Controls and Communications Design of efficient low power strong PUF for security applications AB Patel, S Kamatchi, K Hatti 2021 2nd International Conference on Smart Electronics and Communication Characteristics of the IT Firms and their implications on Innovation: An Empirical Study of Indian IT Firms S Raichur, K Hatti, S Thangavelu, A Jyotishi Int. J. Control Theory Appl. 10 (4) Performance Analysis of 4: 1 MUX APUF Architecture Implemented on Zynq 7000 SoC FPGA K HATTI, C PARAMASIVAM Integration, 102379
Mrs. Kaveri Hatti | Engineering| Women Researcher Award Profile Googlescholar Education averi Hatti is a dedicated researcher and educator in the field of VLSI Design, Embedded Systems, and Hardware Security. She is currently pursuing a Ph.D. at Amrita School of Engineering, Bangalore, focusing on FPGA-based security architectures. With a strong academic background, she holds an M.Tech in VLSI Design and Embedded Systems from VTU Regional Office, Gulbarga, and a B.Tech in Electronics and Communication Engineering from SLN College of Engineering, Raichur. Kaveri has extensive teaching experience, having served as a Lecturer at Tagore Memorial Polytechnic College and Government Polytechnic College in Raichur before joining Amrita School of Engineering, Bangalore, as a Teaching Assistant in 2022. Her expertise lies in FPGA design, Verilog, RTL design, and hardware security implementations, utilizing tools like Xilinx ISE, VIVADO, ModelSim, and Cadence. Work experience Kaveri Hatti has a strong background in academia, with extensive teaching experience spanning several years. She began her career as a Lecturer at Tagore Memorial Polytechnic College, Raichur, from August 2009 to December 2012, where she played a key role in instructing and mentoring students in electronics and communication engineering. Simultaneously, she also served as a Lecturer at Government Polytechnic College, Raichur, from June 2009 to June 2011. Currently, she is working as a Teaching Assistant at Amrita School of Engineering, Bangalore, since February 2022, contributing to research and assisting in the academic development of students in the field of VLSI Design and Embedded Systems. Publication Design and Implementation of Enhanced PUF Architecture onFPGA K hatti International Journal of Electronics Letters, https://doi.org/10.1080 The mux-based puf architecture for hardware security K Hatti, C Paramasivam 2021 International Conference on Circuits, Controls and Communications Design of efficient low power strong PUF for security applications AB Patel, S Kamatchi, K Hatti 2021 2nd International Conference on Smart Electronics and Communication Characteristics of the IT Firms and their implications on Innovation: An Empirical Study of Indian IT Firms S Raichur, K Hatti, S Thangavelu, A Jyotishi Int. J. Control Theory Appl. 10 (4) Performance Analysis of 4: 1 MUX APUF Architecture Implemented on Zynq 7000 SoC FPGA K HATTI, C PARAMASIVAM Integration, 102379